Electrical computers and digital processing systems: memory – Address formation – Operand address generation
Reexamination Certificate
2005-12-20
2005-12-20
Tran, Denise (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Operand address generation
C711S133000, C711S135000, C711S144000, C711S145000, C711S159000
Reexamination Certificate
active
06978357
ABSTRACT:
A method and apparatus for including in a computer system, instructions for performing cache memory invalidate and cache memory flush operations. In one embodiment, the computer system comprises a cache memory having a plurality of cache lines each of which stores data, and a storage area to store a data operand. An execution unit is coupled to the storage area, and operates on data elements in the data operand to invalidate data in a predetermined portion of the plurality of cache lines in response to receiving a single instruction.
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Hacking Lance
Hsieh Hsien-Cheng E.
Huff Thomas
Pentkovski Vladimir
Thakkar Shreekant
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Tran Denise
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