Method and apparatus for patching code and data residing on...

Details Method and apparatus for patching code and data residing on... Method and apparatus for patching code and data residing on...

2005-08-16

2005-08-16

Padmanabhan, Mano (Department: 2188)

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

Addressing extended or expanded memory

C711S137000, C712S205000, C712S207000, C712S234000

Reexamination Certificate

active

06931477

ABSTRACT:
A method and apparatus for applying patches to a code or data residing on a non-volatile memory device is illustrated. A code residing at a first location in a non-volatile memory can be replaced by a codes residing at a second locations in a memory map. A patching device compares a first address of a first code to an address identified by a pre-fetch instruction. If the first address matches the address identified by the pre-fetch instruction, a pre-fetch abort is issued to facilitate replacing a bad code residing at the first address with a good code. The good code can be pointed to by a vector in a vector table where the address of the vector is dynamically loaded into a program counter.

REFERENCES:
patent: 5623608 (1997-04-01), Ng
patent: 6378068 (2002-04-01), Foster et al.
patent: 6463549 (2002-10-01), Shperber et al.
patent: 2002/0124161 (2002-09-01), Moyer et al.

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