Method and apparatus for partial reconfiguration circuit...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07640527

ABSTRACT:
Method, apparatus, and computer readable medium for circuit design for a programmable device is described. In one example, a logical description of a circuit design having static logic and reconfigurable logic is imported into a graphical environment. The circuit design is processed in the graphical environment. In particular, the logical description is floorplanned to locate the static logic and the reconfigurable logic in a floorplan of the programmable device. At least one design rule check (DRC) is performed. A partial reconfiguration implementation of the circuit design is then managed for the programmable device.

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Dorairaj, Nij et al., “PlanAhead Software As A Platform For Partial Reconfiguration”, Xcell Journal, 2005, pp. 68-71, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124.
Goosman, Mark, et al., entitled “How to Take Advantage of Partial Reconfiguration in FPGA Designs”, Programmable Logic Design Line, Feb. 6, 2006, 6 pages.

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