Method and apparatus for output data synchronization with...

Details Method and apparatus for output data synchronization with... Method and apparatus for output data synchronization with...

2011-03-29

2011-03-29

Burd, Kevin M (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C327S156000

Reexamination Certificate

active

07916821

ABSTRACT:
A method and apparatus are provided for substantially reducing or eliminating the timing skew caused by delay elements in a delay locked loop. A method and apparatus are disclosed wherein a rising edge of a local timing signal is established and phase-locked to a rising edge of a system clock signal by delaying the system clock signal. A falling edge of the local timing signal is established and phase-locked to a falling edge of the system clock signal by further delaying only a portion of a signal representative of the delayed clock signal. By separately delaying different portions of the system clock signal and using the separately delayed portions to establish a local timing signal, a local timing signal may be established which is compensated for the varied effects of delay elements in a delay locked loop.

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