Method and apparatus for ordering writeback data transfers on a

Details Method and apparatus for ordering writeback data transfers on a Method and apparatus for ordering writeback data transfers on a

1996-09-06

1999-07-13

Sheikh, Ayaz R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711143, G06F 1314, G06F 1200

Patent

active

059238577

ABSTRACT:
A method and apparatus for ordering data transfers includes an identifier of a critical portion of data being received from a requesting agent along with a request for data. Writeback data corresponding to the requested data is then transferred to the bus as a plurality of portions and ordered to ensure that a first portion which includes the critical portion of the data is transferred to the bus first.

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Popescu, Val, Merle Schultz, John Spracklen, Gary Gibson, Bruce Lightner and David Isaman, "The Metaflow Architecture", IEEE Micro, Jun. 1991, pp. 10-13 and 63-73.

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