Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-03-18
2008-03-18
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
11207274
ABSTRACT:
One embodiment of the present invention provides a system that optimizes a logic network. During operation, the system receives a first logic network which defines a logical function, wherein the first logic network cannot be efficiently optimized by directly using an optimization process that preserves the logical function. Next, the system creates an intermediate logic network based on the first logic network, wherein the intermediate logic network defines an intermediate logical function which is different from the logical function, wherein the intermediate logic network can be efficiently optimized using the optimization process. The system then optimizes the intermediate logic network using the optimization process to create an optimized intermediate logic network. Next, the system creates an optimized first logic network based on the optimized intermediate logic network. In this way, the system indirectly uses the optimization process to efficiently optimize the first logic network.
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Kik Phallaka
Park Vaughan & Fleming LLP
Sandoval Patrick
Synopsys Inc.
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