Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2008-04-23
2010-06-22
Dang, Khanh (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S038000, C714S724000
Reexamination Certificate
active
07743199
ABSTRACT:
An integrated bus architecture for transmitting trace information from a plurality of processors included on an integrated chip having one or more peripheral I/O channels comprises a segmented bus having a plurality of segments arranged in a ring topology and configured to transmit trace information in a circular pathway from upstream segments to downstream segments, and one or more trace output circuits each connected to a respective segment and each including a switch configured to be dynamically toggled between enabled and disabled states. The plurality of segments includes a respective segment for each processor having a coupling unit connected to a trace port of the processor. The coupling unit is configured to receive trace information from the trace port, to receive trace information from the adjacent upstream segment, and to transmit items of trace information to the adjacent downstream segment. Each trace output circuit is configured to transmit trace information to a respective peripheral I/O channel when in the enabled state. Each trace output circuit is configured to transmit trace information to the adjacent downstream segment when in the disabled state.
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Gang Zhang
Kohda Yasuteru
Ohba Nobuyuki
Takano Kohji
Alexanian Vazken
Cantor & Colburn LLP
Dang Khanh
International Business Machines - Corporation
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