Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2006-06-06
2006-06-06
Baumeister, B. William (Department: 2891)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S724000, C438S758000, C438S761000, C438S769000, C438S775000, C438S778000, C438S785000, C438S787000, C438S791000, C438S792000, C438S798000, C438S932000
Reexamination Certificate
active
07056842
ABSTRACT:
According to the invention, while performing plasma-enhanced chemical vapor deposition on a substrate by exposing the substrate in a vacuum to a flow of particles generated by a plasma, which particles react to form a passivation layer on the substrate, a grid is interposed between the plasma and the substrate, thereby reducing the flow of charged particles towards the substrate while conserving a flow of neutral particles. The grid is formed of metal wires that are crossed at a pitch that is less than two or three times the Debye length (λD) of the plasma used, at least at the beginning of deposition. The aging properties of semiconductor components made by such a method is thereby improved.
REFERENCES:
patent: 4987346 (1991-01-01), Katzschner et al.
patent: 5304250 (1994-04-01), Sameshima et al.
patent: 5894159 (1999-04-01), Mori et al.
patent: 6444327 (2002-09-01), Yuda et al.
patent: 6960537 (2005-11-01), Shero et al.
patent: 2002/0185226 (2002-12-01), Lea et al.
patent: 2003/0056726 (2003-03-01), Holst et al.
patent: 2003/0232495 (2003-12-01), Moghadam et al.
patent: 2004/0048492 (2004-03-01), Ishikawa et al.
patent: 2004/0203177 (2004-10-01), Davis et al.
patent: 2005/0001555 (2005-01-01), Parsons et al.
patent: 0 488 393 (1992-06-01), None
patent: 1 220 272 (2002-07-01), None
patent: WO 0070117 (2000-11-01), None
patent: WO 02/078043 (2002-10-01), None
Takashi Yunogami et al, “Development of Neutral-Beam Assisted Etcher”, Journal of Vacuum Science and Technology; Part A, American Institute of Physics, New York, US, vol. 13, No. 3, Part 1, May 1, 1995, pp. 952-958, XP000531596.
Patent Abstracts of Japan, vol. 1996, No. 10, Oct. 31, 19896 corresponding to JP 08 167596 A (Sony Corp. dated Jun. 25, 1996.
Jany Christophe
Puech Michel
Alcatel
Baumeister B. William
Sughrue & Mion, PLLC
Yevsikov Victor V.
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