Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2000-07-31
2003-03-25
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S039000, C326S037000, C365S228000, C716S030000
Reexamination Certificate
active
06538468
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to programmable logic devices (PLDs), and more particularly to PLDs that may receive configuration information from a storage device.
BACKGROUND OF THE INVENTION
Programmable logic has increasingly become a valued resource for system designers. Programmable logic can allow for a custom logic design to be implemented without the initial cost, delay and complexity of designing and fabricating an application specific integrated circuit (ASIC).
Currently, there are many variations of programmable logic, including simple programmable logic devices (SPLDs), complex PLDs (CPLDs), and field programmable gate arrays (FPGAs). Such devices typically include programmable logic circuits that operate in conjunction with corresponding memory circuits. The particular function of a logic circuit can be determined according to data stored in a corresponding memory circuit. Some programmable logic arrangements can include switching circuits (also called programmable interconnects) that can enable and/or disable switching paths according to data stored in a memory circuit. A memory circuit is typically a nonvolatile memory circuit, such as a programmable read-only-memory (PROM), an electrically programmable ROM (EPROM), and/or electrically erasable and programmable ROM (EEPROM), including “flash” EEPROMs.
A nonvolatile memory circuit can be formed on a different integrated circuit than programmable logic. That is, a programmable logic circuit die can receive configuration information from an associated nonvolatile memory circuit that may be on the same die or a separate die.
In addition to the above basic structure, programmable logic arrangements may have alternate structures. For example, while a system may include a separate programmable logic device and an EEPROM memory circuit, some processes may be capable of forming nonvolatile devices and conventional volatile devices on the same integrated circuit. In such a case, the nonvolatile memory circuit is “on-chip” (or integrated) with a volatile programmable logic circuit.
To configure programmable logic, a memory circuit within the device can be programmed with data values that give the desired functionality. In many cases, a volatile PLD and nonvolatile memory device may be included in the same assembly. When power is applied to the assembly (e.g., upon bootup), a volatile PLD can automatically load configuration data stored in a corresponding nonvolatile memory.
PLDs are typically included within a larger electronic device to provide a particular function. That is, in a normal operating mode, a PLD may perform particular logic function determined according to user configuration data. However, an electronic system may have other modes where additional functions are desired. For example, an electronic device may have a programming mode in which the device can be configured in a variety of ways. In order to execute programming operations, the device may include or have to be connected to, a computing device. Such a computing device may include, but is not limited to, a microcontroller, microprocessor or digital signal processor (DSP) device. A computing device can execute various steps required in a programming operation. Unfortunately, the addition of a computing device can add to the size, cost, or complexity of an electronic device.
To better understand the operation of the various embodiments of the present invention, the operation of a conventional programmable logic assembly will now be described.
Referring now to
FIGS. 9A and 9B
, a programmable logic assembly
900
is shown that includes a nonvolatile memory
902
and a volatile programmable logic device (PLD)
904
. A volatile PLD can include a bootup state machine
906
. A bootup state machine
906
may execute a series of functions when power is initially supplied to an assembly
900
.
FIG. 9A
shows a conventional programming operation. Configuration data may be entered that can establish a user-defined functionality for a volatile PLD
904
. In particular, configuration data may be entered by way of a volatile PLD
904
programmed into a nonvolatile memory
902
.
FIG. 9B
shows a bootup operation. In a bootup operation, a state machine
906
may detect that power is being initially supplied to an assembly
900
. A state machine
906
may then apply a series of read commands to a nonvolatile memory
902
. In response to such read commands a nonvolatile memory
902
can provide user configuration data to a volatile PLD
904
. User data can be received by a volatile PLD
904
to establish a function for a volatile PLD
904
. As but one example, in response to a series of read commands, user configuration data from a nonvolatile memory
902
can be stored in corresponding locations of a volatile memory within a volatile PLD
904
. In this way, a volatile PLD
904
may be programmed to perform a user-determined function.
While a programmable logic assembly
900
may be user configured to perform a particular function, as noted above, a system may have a need for other functions. In addition, in some cases there may be a particular configuration for a programmable logic assembly
900
that is commonly desired, such as a microcontroller or some other computing device.
In light of the above discussion, it would desirable to arrive at some way of providing additional functionality to a programmable logic assembly.
SUMMARY OF THE INVENTION
The present invention includes a programmable logic assembly that may include a volatile programmable logic device (PLD) that may be selectively configured in response to a particular event, such as powerup and/or reset.
According to one aspect of the embodiments, a programmable logic assembly may include two or more nonvolatile memory devices that may each store configuration data. In response to a select signal, a multiplexer can provide configuration data from one of the nonvolatile memory devices.
According to another aspect of the embodiments, a programmable logic assembly may include a nonvolatile memory device with two or more different address spaces. In response to a select state, configuration data may be read from one address space to a volatile PLD.
According to another aspect of the embodiments, a programmable logic assembly may include a first nonvolatile memory formed on a different die than a volatile PLD and a second nonvolatile memory formed on the same die as a volatile PLD. A first and second nonvolatile memory may store different configuration data sets.
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Agrawal, Dr. Om, “Non-Volatility and Infinited Reconfigurability in PLDs”,Lattice Semiconductor “WHITE PAPER” available at www.latticesemi.com.
U.S. Patent Application Serial No. 09/751,234, filed Dec. 27, 2000PLD Configuration Architecture(not published).
Cypress Semiconductor Corporation
Sako Bradley T.
Tan Vibol
Tokar Michael
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