Method and apparatus for multi-interrupt controller for...

Details Method and apparatus for multi-interrupt controller for... Method and apparatus for multi-interrupt controller for...

2006-10-17

2006-10-17

Dang, Khanh (Department: 2111)

Electrical computers and digital data processing systems: input/

Interrupt processing

Programmable interrupt processing

C710S263000, C710S269000

Reexamination Certificate

active

07124225

ABSTRACT:
The present inventions provide a controlling device for reducing external interrupts for a processor and the method thereof in a real time system. The controlling device decides whether it should trigger a real interrupt to the processor or combining as many interrupts as possible in one interrupt. The controlling device comprises a buffer, an interrupt controller, and an interrupt recording table. The interrupt controller receives interrupts, then saving information of interrupts to the buffer and reading out limitations of the interrupts, the limitations including interrupt deadlines and processing time of each interrupt. The interrupt recording table stores the limitations of each interrupt. The interrupt controller comprises a timer for counting timing references of the interrupt signals. After receiving an interrupt, the interrupt controller compares the limitations and selectively sends an interrupt signal, a real hardware interrupt, to the processor.

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