Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2001-09-28
2003-08-19
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
With measuring or testing
C438S011000, C438S016000, C438S018000, C438S687000
Reexamination Certificate
active
06607927
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to semiconductor manufacturing processes, and more specifically to monitoring and determining copper contamination during the manufacture of integrated circuits on semiconductor wafers.
BACKGROUND OF THE INVENTION
Semiconductor devices are very vulnerable to several different types of contaminants that can affect the physical and electrical properties of the device by lowering the processing yield, changing device performance, and decreasing the device reliability. Yields decrease when contaminants alter the inherent properties of the various material layers and the cleanliness of surfaces. Device parametric values, such as threshold voltage or capacitance, are also changed by such contaminants. Since certain metallic contaminants are mobile, they may not be detected under typical device testing immediately after fabrication, but gradually diffuse inside the device and settle in electrically sensitive areas, causing failures long after the test process has been completed and the device is in use.
Contaminants that are inadvertently added during the processing of a device can be broadly classified into particles and chemical/metallic contaminants. Many such contaminants are present in the various chemicals and fabrication equipment commonly used in semiconductor processing. Due to the ever decreasing feature sizes and thinner deposition layers, devices continue to suffer increasing vulnerability to such contaminants. Because the desired effects of a semiconductor device are achieved using very small quantities of dopants, small quantities of electrically active contaminants can alter the electrical characteristics, changing the device performance and its reliability parameters. A major source of such contaminants are ionic contaminants, that is, atoms and minerals that exist in the semiconductor in ionic form. These metallic ions are highly mobile in the semiconductor material and can therefore cause the device performance characteristics to change during operation, although the device had previously passed electrical testing immediately following fabrication. All fabrication process operators strive to reduce contaminants and to detect those that find their way into the process stream.
It is known that copper contamination of an integrated circuit can significantly change the device functional characteristics. For example, unexpected copper contaminants can cause the capacitance of a contaminated wafer site to differ significantly from the desired design capacitance. Also, like all semiconductor crystal impurities, copper contamination introduces one or more discrete energy levels into the silicon and/or dielectric band gaps between the conduction band and the valence band. These defects form generation/recombination centers (also referred to as traps) that affect the device operation, acting as recombination centers when there are excess carriers in the semiconductor, and as generation centers when the carrier density is below an equilibrium value (e.g., in the reverse-biased space-charge region of a pn junction).
The present trend in the integrated circuit fabrication industry is moving toward more frequent use of copper damascene interconnect processes, and the decreased use of aluminum interconnects. As a result, there are increased opportunities for copper contamination during the fabrication process. This is especially problematic because copper, among all transition metal impurities, exhibits the highest diffusivity and solubility in silicon. Even trace copper contamination can significantly degrade circuit performance and fabrication yields. As a result, during the fabrication process, barrier layers are employed to prevent diffusion of copper from a copper interconnect into an active device area. But trace copper contaminants can also find their way into the active areas through the use of common metrology and cosmetic inspection tools and fabrication facilities (e.g., diffusion or rapid thermal anneal furnaces) for both copper and non-copper interconnected integrated circuits. During testing, some of these tools require physical contact to a chip's metal layer, resulting in adhesion of residual metal particles on the tool after the test has been completed. For example, electrical probe tips frequently show signs of copper contamination after use on a copper-interconnected wafer. Cross-contamination of copper occurs later when the tool is used on a device active area during the fabrication process. In process furnaces, copper is readily volatized even at high temperatures, due to the gettering effect of the furnace ambients, contaminating active surfaces of wafers in the thermal processing tube and adhering to the thermal processing tube walls, possibly contaminating future wafers processed through the furnace. A single copper-contaminated chamber or tool may affect front and/or back end processing of hundreds of subsequent wafers. One potential solution, the purchase of two sets of tools, one for copper-interconnected integrated circuits and the other for non-copper interconnected circuits, is generally considered cost prohibitive.
One prior art technique for measuring copper and other contaminant densities is x-ray fluorescence (XRF). It is known that incident x-rays are absorbed, emitted, reflected or transmitted from a solid. In the x-ray fluorescence process, incident x-rays on the sample are absorbed by ejecting electrons from the atomic K-shell. Then electrons from higher levels, for example the L-shell, drop into the K-shell vacancies and the liberated energy is emitted as characteristic secondary x-rays. The total reflection XRF (TXRF) technique, illustrated in
FIG. 1
, is one in which x-rays strike the sample at a very shallow angle, penetrating only a small distance into the sample. An x-ray source
12
produces x-rays that are targeted, via a path
14
a
, to a monochromator
16
, which filters out all but a specified x-ray wavelength and focuses the resulting x-ray signal, via a path
14
b
, to a specified point
18
on a wafer
20
. The reflected x-rays are illustrated by a path
14
c
. Standing waves are formed above the wafer
20
and detected in a detector
22
, which is located within about one mm of the wafer surface. Due to the near total reflection of the incident x-ray, the wafer
20
contributes very little to the spectrum in the standing wave. The x-ray energy in the standing wave identifies the impurity type, and the energy intensity provides a measure of the impurity density. Typical analysis areas are one cm
2
although advanced instruments can analyze areas as small as 10
−6
to 10
−5
cm
2
.
To determine the presence of contaminants, a typical TXRF tool requires approximately 1000 seconds to monitor a four mm
2
wafer region. Because a single four mm
2
area on an eight inch wafer is a relatively insignificant amount of surface area from which to determine whether or not contamination exists across the entire wafer, a number of such regions must be tested by the TXRF tool. Typically, when looking for copper contaminants, a minimum of three to nine sites are checked. If five sites are checked, the process consumes a total of 5000 seconds or approximately 80 minutes to accurately determine whether or not contamination exists at the five sites. Because this detection time is relatively long compared with other steps in the integrated circuit fabrication process, it is not feasible to test more than about nine sites on a wafer and further not feasible to test every wafer for contamination in an in-line process. Also, the information produced by the TXRF analysis requires several days of evaluation to finally yield detailed copper contamination results. Because the process checks only a few wafer regions, the process does not yield accurate data as to the distribution of the copper contamination across the wafer. In fact, the TXRF tool can miss contaminants because it checks only a limited number of discontinuous wafer regions. For example, if contamination exists
DeBusk Damon Keith
Ramappa Deepak A.
Agere Systems Inc.
Beusse Brownlee Bowdoin & Wolter P.A.
DeAngelis Jr. John L.
Jr. Carl Whitehead
Pham Thanhha
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