Method and apparatus for minimizing the influence of a...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis

Reexamination Certificate

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C713S400000, C713S401000, C713S503000, C713S600000, C327S141000, C327S144000, C327S153000, C327S154000

Reexamination Certificate

active

07987382

ABSTRACT:
One inventive aspect relates to a digital sub-circuit suitable for embedding in an at least partially digital circuit for minimizing the influence of another digital sub-circuit on the at least partially digital circuit, the other digital sub-circuit being part of the at least partially digital circuit. The influence of the other digital sub-circuit may, for example, be the introduction of ground bounce by switching of the other digital sub-circuit. Another inventive aspect relates to an at least partially digital circuit comprising such a digital sub-circuit for minimizing the influence of another digital sub-circuit to the at least partially digital circuit and to a method for reducing the influence of another digital sub-circuit to an at least partially digital circuit.

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