Electrical computers and digital processing systems: support – Computer power control
Reexamination Certificate
2005-09-08
2008-07-29
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Computer power control
C713S320000
Reexamination Certificate
active
07406609
ABSTRACT:
Leakage current in semiconductor logic can be minimized using the present systems and techniques. For example, a CMOS circuit for low leakage battery operation can connect a real time clock to the power supply when available or to a low leakage source when the power supply is not available.
REFERENCES:
patent: 5461338 (1995-10-01), Hirayama et al.
patent: 5838171 (1998-11-01), Davis
patent: 5909140 (1999-06-01), Choi
patent: 5917365 (1999-06-01), Houston
patent: 6097113 (2000-08-01), Teraoka et al.
patent: 6191470 (2001-02-01), Forbes et al.
patent: 6307233 (2001-10-01), Awaka et al.
patent: 6373321 (2002-04-01), Yamauchi et al.
patent: 6380798 (2002-04-01), Mizuno et al.
patent: 6715090 (2004-03-01), Totsuka et al.
patent: 2004/0158756 (2004-08-01), Tosuka et al.
patent: 10189884 (1998-07-01), None
patent: 10-1998-0004940 (1998-03-01), None
patent: 10-1999-0078182 (1999-10-01), None
Anonymous,Diode Battery Back-Up Switch, IBM Technical Disclosure Bulletin, vol. 30, No. 2, Jul. 1, 1987, p. 895.
Muhammad M. Khellah and M.I. Emasry,Power Minimization of High-Performance Submicron CMOS Circuits Using a Dual-Vd Dual-Vth(DVDV)Approach, Proceedings 1999 International Symposium on Low Power Electronics and Design, Aug. 1999, ACM, pp. 106-108.
K. Roy, Leakage power reduction in low-voltage CMOS designs, Electronics, Circuits and Systems, 1998 IEEE International Conference, vol. 2, 1998, pp. 167-173.
Office Action received in Korean Patent Application No. 10/2000/7008020.
Office Action received in Chinese Patent Application No. 00817542.X.
International Preliminary Examination Report received in PCT/US00/42597.
International Search Report received in PCT/US00/42597.
Uzelac Lawrence S.
Volk Andrew M.
Fish & Richardson P.C.
Intel Corporation
Perveen Rehana
Stoynov Stefan
LandOfFree
Method and apparatus for minimizing leakage current in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for minimizing leakage current in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for minimizing leakage current in... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3969511