Method and apparatus for memory utilization

Details Method and apparatus for memory utilization Method and apparatus for memory utilization

2006-12-07

2010-10-19

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S156000, C711S163000

Reexamination Certificate

active

07818503

ABSTRACT:
One embodiment of the invention provides a method and apparatus for utilizing memory. The method includes reserving a first portion of a cache in a processor for an inbox. The inbox is associated with a first thread being executed by the processor. The method also includes receiving a packet from a second thread, wherein the packet includes an access request. The method further includes using inbox control circuitry for the inbox to process the received packet and determine whether to grant the access request included in the packet.

REFERENCES:
patent: 7412568 (2008-08-01), Dai et al.
patent: 2001/0014931 (2001-08-01), Aglietti et al.
patent: 2002/0002657 (2002-01-01), Sturges et al.
patent: 2005/0102486 (2005-05-01), Lakshmanamurthy et al.

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