Method and apparatus for memory sequencing

Details Method and apparatus for memory sequencing Method and apparatus for memory sequencing

1995-10-26

1999-02-16

Pham, Chi H.

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375370, 375356, 370412, 370413, 370422, H04L 2710, H04L 700, H04L 1228

Patent

active

058728228

ABSTRACT:
A method and apparatus for delaying frames received asynchronously from a fiber channel port until receive memory is properly sequenced for storing the delayed frames in which a circular buffer is positioned on the data path between the fiber channel port and the receive memory for delaying the frames in accordance with control signals generated by a sequencer having knowledge of the receive memory sequence count.

REFERENCES:
patent: 4823365 (1989-04-01), Loginov
patent: 4928275 (1990-05-01), Moore et al.
patent: 5131013 (1992-07-01), Choi
patent: 5329557 (1994-07-01), Suzuki et al.
patent: 5333197 (1994-07-01), Febvre
patent: 5426639 (1995-06-01), Follett et al.
patent: 5452010 (1995-09-01), Doornink
patent: 5457717 (1995-10-01), Bellamy

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