Method and apparatus for memory redundancy and recovery from...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment

Reexamination Certificate

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C714S041000

Reexamination Certificate

active

07139942

ABSTRACT:
A system maintains a copy of data stored in a first memory device in a redundant distinct second memory device. Upon detecting an uncorrectable error in the first memory device, the system then relies on the copy of the data in the second memory device. The system, once it starts relying on the data in the second memory device, may then test the first memory device to determine if the uncorrectable error was due to a physical problem or a transient event. If the first memory device is then found to be working correctly, it may, in turn, become a redundant memory device for the second memory device.

REFERENCES:
patent: 6941505 (2005-09-01), Yada et al.
patent: 2002/0042893 (2002-04-01), Larson et al.
patent: 2002/0069334 (2002-06-01), Hsia et al.
patent: 2002/0069337 (2002-06-01), Hsia et al.
patent: 1 512 220 (1975-10-01), None
Satya et al., “Electronic Reorganization of Memory for Handling Uncorrectable Memory Errors”,IBM Technical Disclosure Bulletin, vol. 22, No. 12, pp. 5378-5381, May 1980.

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