Static information storage and retrieval – Read/write circuit – Differential sensing
Patent
1997-08-01
1999-12-14
Hoang, Huan
Static information storage and retrieval
Read/write circuit
Differential sensing
365205, 365207, G11C 702
Patent
active
06002626&
ABSTRACT:
A method and apparatus is provided for implementing a memory cell array having a performance-improved critical read path using a Domino boost amplifier configuration. The memory bit line is broken into small segments with a Domino boost amplifier and the bit line is connected to the input of the amplifier. The output of the amplifier drives the global bit line. The amplifier is turned "on" during a "read" and turned "off" during a "write". During a read, one memory cell within one array segment is turned on. The memory cell drives the differential signal on to the local bit line pair. Also during a read, the boost amplifier which attaches to that local bit line is enabled. The boost amplifier amplifies the input signal (local bit line pair) and drives that signal on to the global bit line. Since the bit line is broken into small segments with boost amplifiers, there are many boost amplifiers attached on the global bit line. When enough signal is developed on the global bit line pair, the other boost amplifiers which are attached to the global bit line will be turned on. The bit line is thus quickly pulled to ground thereby significantly improving performance for the critical read path.
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Lattimore George McNeil
Ross, Jr. Robert Anthony
Yeung Gus Wai-Yen
England Anthony V. S.
Ho Hoai V.
Hoang Huan
International Business Machines - Corporation
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