Method and apparatus for memory access

Details Method and apparatus for memory access Method and apparatus for memory access

2006-03-21

2006-03-21

Tung, Kee M. (Department: 2671)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Cache

C345S520000, C345S532000, C711S141000

Reexamination Certificate

active

07015921

ABSTRACT:
An apparatus, in a data processing system having at least one host processor with host processor cache and host memory, includes a chip interconnect, a cache coherent interface coupled to the chip interconnect wherein the cache coherent interface provides cache coherent access, a cache non-coherent interface coupled to the chip interconnect wherein the cache non-coherent interface provides cache non-coherent access to the host memory, and a compute engine coupled to the chip interconnect and coupled to the cache coherent interface and coupled to cache non-coherent interface wherein the compute engine issues a memory access request. Other methods and apparatuses are also described.

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