Method and apparatus for measuring pipeline stalls in a...

Electrical computers and digital processing systems: processing – Processing control

Reexamination Certificate

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C712S227000

Reexamination Certificate

active

07617385

ABSTRACT:
A computer implemented method, apparatus, and computer program product for monitoring execution of instructions in an instruction pipeline. The process identifies a number of stall cycles for a group of instructions to complete execution. The process retrieves a deterministic latency pattern corresponding to the group of instructions. The process compares the number of stall cycles to the deterministic execution latency pattern. The process identifies the instruction as a dependent instruction in response to a determination that an instruction in the group of instructions completed a deterministic number of cycles after an antecedent instruction completed.

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