Method and apparatus for measuring jitter

Details Method and apparatus for measuring jitter Method and apparatus for measuring jitter

2007-06-26

2007-06-26

Kim, Kevin (Department: 2611)

Pulse or digital communications

Synchronizers

Synchronization failure prevention

C375S360000, C375S371000, C327S141000, C714S700000, C714S746000, C714S798000

Reexamination Certificate

active

10826198

ABSTRACT:
In a method for measuring jitter, a signal under test is inputted to generate signal transition locations. A signal transition location is latched using a sampling clock signal, and the signal transition location is converted to a delay value. The delay value is converted to an edge position output, and a value of the edge position output is detected.

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“FPGA and CPLD Architectures: A Tutorial”, Summer 1996, IEEE Design and Test of Computers, vol. 13, No. 2, p. 43, 51-53.

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