Method and apparatus for mapping flip-flop logic onto shift...

Details Method and apparatus for mapping flip-flop logic onto shift... Method and apparatus for mapping flip-flop logic onto shift...

2008-03-12

2010-06-08

Levin, Naum B (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C714S725000

Reexamination Certificate

active

07735045

ABSTRACT:
Method and apparatus for mapping flip-flop logic onto shift register logic is described. In one example, a method of processing flip-flop logic in a circuit design for implementation in an integrated circuit is provided. A chain of flip-flops in the circuit design is identified. The chain of flip-flops includes first and second control signals. A shift register is instantiated in a logical description of the circuit design for the chain of flip-flops. A shift register is instantiated in the logical description for the chain of flip-flops. First and second control chains of flip-flops are instantiated in the logical description for the first and second control signals, respectively. A multiplexer is instantiated in the logical description and is configured to select among an output of the shift register, an asserted logic state, and a de-asserted logic state based on outputs of the first and second control chains.

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