Method and apparatus for manipulation of digital data in multipl

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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395877, 711149, 711167, 711168, G06F 1300

Patent

active

061224448

ABSTRACT:
A method and apparatus for performing signal processing using incongruent buffers. According to one method described, a maximum concurrent run length (MCRL) is calculated to indicate the maximum run length before any of a plurality of buffers is exhausted. Processing data for each of the plurality of incongruent buffers is then repeated until the maximum concurrent run length has been reached. The calculation of the MCRL may be a determination of which of the plurality of buffers has a lowest remaining time before buffer exhaustion or the least number of remaining buffer entries. A system described includes a processor coupled to memory. The memory contains a plurality of buffer counters and a plurality of memory blocks defining a plurality of incongruent buffers. The memory also contains a MCRL calculation routine for determining the MCRL count from the buffer counters. A data processing routine repeats manipulations of data in the incongruent buffers until the MCRL count is reached.

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patent: 4945548 (1990-07-01), Iannarone et al.
patent: 5319583 (1994-06-01), Wildes
patent: 5680482 (1997-10-01), Liu et al.

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