Method and apparatus for managing timestamps when storing data

Data processing: measuring – calibrating – or testing – Testing system – Signal generation or waveform shaping

Reexamination Certificate

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C711S100000

Reexamination Certificate

active

07031869

ABSTRACT:
A system is disclosed in which an on-chip logic analyzer (OCLA) includes timestamp logic capable of providing clock cycle resolution of data entries using a relatively small number of bits. The timestamp logic includes a counter that is reset each time a store operation occurs. The counter counts the number of clock cycles since the previous store operation, and if enabled by the user, provides a binary signal to the memory that indicates the number of clock cycles since the previous store operation, which the memory stores with the state data. If the counter overflows before a store operation is requested, the timestamp logic may force a store operation so that the time between stores can be determined.

REFERENCES:
patent: 6321331 (2001-11-01), Roy et al.
patent: 6611901 (2003-08-01), Micka et al.
patent: 517917 (2002-08-01), None
patent: WO 02/077810 (2002-10-01), None
Shobaki, Mohammed EI, Sep. 2004, Uppsala University Department of Information Technology, MRTC Report 2004/120, pp. 78-79.

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