Method and apparatus for managing target devices in a...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Dynamic-type storage device

Reexamination Certificate

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Details

C711S111000, C711S209000, C710S009000, C710S038000

Reexamination Certificate

active

06629189

ABSTRACT:

FIELD OF THE INVENTION
The present invention is directed to a method and apparatus for managing access to target devices in a multi-path computer system.
DESCRIPTION OF THE RELATED ART
Many computer systems include one or more host computers, and one or more resources that include target devices accessible by the host computers. An example of a typical computer system resource is a storage system that stores data used by one or more of the host computers. An example of a computer system including a host computer
1
and a storage system
3
is shown in FIG.
1
.
The storage system
3
includes a plurality of disk drives
5
a-b
, and a plurality of disk controllers
7
a
-
7
b
that respectively control access to the disk drives
5
a
and
5
b
. The storage system
3
further includes a plurality of storage bus directors
9
that control communication with the host computer
1
over communication buses
17
. The storage system
3
further includes a cache
11
to provide improved storage system performance. In particular, when the host computer
1
executes a read from the storage system
3
, the storage system
3
may service the read from the cache
11
(when the data is stored in the cache), rather than from one of the disk drives
5
a
-
5
b
, to execute the read more efficiently. Similarly, when the host computer
1
executes a write to the storage system
3
, the corresponding storage bus director
9
can execute the write to the cache
11
. Thereafter, the write can be destaged asynchronously, in a manner transparent to the host computer
1
, to the appropriate one of the disk drives
5
a
-
5
b
. Finally, the storage system
3
includes an internal bus
13
over which the storage bus directors
9
, disk controllers
7
a
-
7
b
and the cache
11
communicate.
The host computer
1
includes a processor
16
and one or more host bus adapters
15
that each controls communication between the processor
16
and the storage system
3
via a corresponding one of the communication buses
17
. It should be appreciated that rather than a single processor
16
, the host computer
1
can include multiple processors. Each bus
17
can be any of a number of different types of communication links, with the host bus adapter
15
and the storage bus directors
9
being adapted to communicate using an appropriate protocol for the communication bus
17
coupled therebetween. For example, each of the communication buses
17
can be implemented as a SCSI bus, with the directors
9
and adapters
15
each being a SCSI driver. Alternatively, communication between the host computer
1
and the storage system
3
can be performed over a Fibre Channel fabric.
As shown in the exemplary system of
FIG. 1
, some computer systems employ multiple paths for communicating between the host computer
1
and the storage system
3
(e.g., each path includes a host bus adapter
15
, a bus
17
and a storage bus director
9
in FIG.
1
). In many such systems, each of the host bus adapters
15
has the ability to access each of the disk drives
5
a-b
, through the appropriate storage bus director
9
and disk controller
7
a-b
. It should be appreciated that providing such multi-path capabilities enhances system performance, in that multiple communication operations between the host computer
1
and the storage system
3
can be performed simultaneously.
Although the provision of multiple paths between the host computer
1
and a system resource such as the storage system
3
provides for improved system performance, it also results in some increased system complexity. For example, some facility is typically required to enable the host computer
1
to recognize that multiple paths have been formed to the same storage devices within the storage system. Referring to the illustrative system of
FIG. 1
, the operating system on the host computer
1
typically will view the storage system
3
as having four times its actual number of disk drives
5
a-b
, since four separate paths are provided to each of disk drives
5
a-b
. Thus, one type of known multi-path system includes an additional mapping layer in the host computer
1
, below the mapping layer (referred to hereafter as the “file system/LVM layer”) including the file system, logical volume manager (LVM) and/or database manager, to reduce the number of storage devices (e.g., disk drives
5
a-b
) visible at the file system/LVM layer to the number of storage devices that actually exist on the storage system
3
.
FIG. 2
is a schematic representation of a number of mapping layers that may exist in such a known multi-path computer system. The system includes an application layer
21
which includes application programs executing on the processor
16
of the host computer
1
. The application layer
21
generally will refer to storage locations used thereby with a label or identifier such as a file name, and will have no knowledge about where the file is physically stored on the storage system
3
(FIG.
1
). Below the application layer
21
is the file system/LVM layer
23
that maps the label or identifier specified by the application layer
21
to a logical volume that the host computer perceives to correspond directly to a physical device address (e.g., the address of one of the disk drives
5
a-b
) within the storage system
3
. Below the file system/LVM layer
23
is a multi-path mapping layer
25
that maps the logical volume address specified by the file system/LVM layer
23
, through a particular one of the multiple system paths, to the logical volume address to be presented to the storage system
3
. Thus, the multi-path mapping layer
25
not only specifies a particular logical volume address, but also specifies a particular one of the multiple system paths to access the specified logical volume.
If the storage system
3
were not an intelligent storage system, the logical volume address specified by the multi-path layer
25
would identify a particular physical device (e.g., one of disk drives
5
a-b
) within the storage system
3
. However, for an intelligent storage system such as that shown in
FIG. 1
, the storage system itself may include a further mapping layer
27
, such that the logical volume address passed from the host computer
1
may not correspond directly to an actual physical device (e.g., a disk drive
5
a-b
) on the storage system
3
. Rather, a logical volume specified by the host computer
1
can be spread across multiple physical storage devices (e.g., disk drives
5
a-b
), or multiple logical volumes accessed by the host computer
1
can be stored on a single physical storage device.
It should be appreciated from the foregoing that the multi-path mapping layer
25
performs two functions. First, it controls which of the multiple system paths is used for each access by the host computer
1
to a logical volume. Second, the multi-path mapping layer
25
also reduces the number of logical volumes visible to the file system/LVM layer
23
. In particular, for a system including X paths between the host computer
1
and the storage system
3
, and Y logical volumes defined on the storage system
3
, the host bus adapters
15
see X times Y logical volumes. However, the multi-path mapping layer
25
reduces the number of logical volumes visible to the file system/LVM layer
23
to equal only the Y distinct logical volumes that actually exist on the storage system
3
.
FIG. 3
is a conceptual representation of the manner in which the multi-path mapping layer
25
reduces the number of logical volumes visible to the file system/LVM layer
23
in the computer system of
FIG. 1
, which includes four paths labeled P
1
-P
4
. In the example shown in
FIG. 3
, the storage system
3
includes twenty logical volumes
51
, labeled LV
1
-LV
20
. The host computer
1
includes four separate labels
53
-
56
(referred to herein as “native names”) for each of logical volumes LV
1
-LV
20
. These native names are identified conceptually in
FIG. 3
as P
1
LV
1
-P
1
LV
20
, P
2
LV
1
-P
2
LV
20
, P
3
LV
1
-P
3
LV
20
and P
4
LV
1
-P
4
LV
20
, to indicate t

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