Method and apparatus for managing a return stack

Details Method and apparatus for managing a return stack Method and apparatus for managing a return stack

2007-04-10

2007-04-10

Treat, William M. (Department: 2181)

Electrical computers and digital processing systems: processing

Processing control

Branching

C712S242000, C712S243000

Reexamination Certificate

active

11061975

ABSTRACT:
A processor includes a return stack circuit used for predicting procedure return addresses for instruction pre-fetching, wherein a return stack controller determines the number of return levels associated with a given return instruction, and pops that number of return addresses from the return stack. Popping multiple return addresses from the return stack permits the processor to pre-fetch the return address of the original calling procedure in a chain of successive procedure calls. In one embodiment, the return stack controller reads the number of return levels from a value embedded in the return instruction. A complementary compiler calculates the return level values for given return instructions and embeds those values in them at compile-time. In another embodiment, the return stack circuit dynamically tracks the number of return levels by counting the procedure calls (branches) in a chain of successive procedure calls.

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Return Address Stack Cache; IBM Technical Disclosure Bulletin; vol. 34, No. 11, Apr. 1992, pp. 269-271.

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