Method and apparatus for maintaining synchronization between...

Details Method and apparatus for maintaining synchronization between... Method and apparatus for maintaining synchronization between...

2006-08-17

2009-06-30

Garbowski, Leigh Marie (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07555739

ABSTRACT:
A method and system for maintaining synchronization between a plurality of layout clones of an integrated circuit design, wherein each layout clone comprises at least one figure. The method comprises tracking relationships between equivalent figures of the plurality of layout clones, wherein the plurality of layout clones are associated with one another within an equivalence group and propagating an edit made in one of the layout clones within an equivalence group to the other layout clones within the equivalence group.

REFERENCES:
patent: 5050091 (1991-09-01), Rubin
patent: 6230305 (2001-05-01), Meares
patent: 7398492 (2008-07-01), Youngman et al.

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