Method and apparatus for machine check abort handling in a...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C714S010000, C714S012000

Reexamination Certificate

active

06684346

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to multiprocessing systems, and in particular to synchronization of multiple processors and shared resources such as cache resources, computation resources or bus resources during exception handling by a machine check abort handling mechanism.
BACKGROUND OF THE INVENTION
Shared resources comprising a hardware component such as a display device or a printer in multiprocessing systems have been managed through a variety of mechanisms. Some of these mechanisms entail the use of atomic primitives such as “test and set”, “compare and swap”, or “load and reserve” to request access to the shared resource. At some system layer the details of such a mechanism and its primitives are specified.
These system level specifications define the resource sharing for a particular system and are not generally portable or scalable to another multiprocessing system without some additional modifications to the same system level specifications or to the specifications of some other system layers. In other words, management of such shared resources is not transparent to the system. Furthermore, for a multiprocessing system having multiple logical processing cores integrated into a single device, management of shared resources in a way that is transparent to the system has not previously been addressed.
Further complexities exist in error detection, correction and recovery for a multiprocessing system that has resources shared by multiple logical processing cores. A machine check abort (MCA) exception occurs in a processor when an error condition has arisen that requires corrective action. Lacking careful synchronization of the multiple logical processing cores and shared resources, damage or data corruption would potentially result. Handling MCA exception conditions in this type of a multiprocessing system has not previously been addressed.


REFERENCES:
patent: 5214652 (1993-05-01), Sutton
patent: 5367668 (1994-11-01), Pandolfo
patent: 5796937 (1998-08-01), Kizuka
patent: 6189117 (2001-02-01), Batchelor et al.
patent: 6453427 (2002-09-01), Quach et al.
patent: 6553512 (2003-04-01), Gibson
patent: 2002/0116438 (2002-08-01), Tu et al.
Milojicic, Dejan et al. Increasing Relevance of Memory Hardware Errors A Case for Recoverable Programming Models, HP Labs, date unknown.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus for machine check abort handling in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for machine check abort handling in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for machine check abort handling in a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3219644

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.