Method and apparatus for limiting the slew rate of output driver

Details Method and apparatus for limiting the slew rate of output driver Method and apparatus for limiting the slew rate of output driver

1995-09-26

1997-06-10

Westin, Edward P.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

326 87, 327170, H03K 190948

Patent

active

056380070

ABSTRACT:
The output driver includes a plurality of transistor devices connected to an output line. A separate flash-programmable element is connected to each of the plurality of transistor devices. Each of the separate flash elements receives the data signal along an input line and outputs the data signal if the flash cell is enabled (or not programmed) and outputs a constant voltage level, regardless of the data signal, if the flash element is not enabled. Hence, only those output transistors connected to flash elements that have been enabled are triggered by the output signal. Other transistors merely receive a constant voltage and are, therefore, not triggered regardless of the output signal. By enabling only a few of the transistors, a current slew rate of current drawn through the transistors is reduced, thereby reducing overall voltage noise levels, although at the expense of slower signal throughput. By enabling all or most transistors, the current slew rate is increased, thereby resulting in greater voltage noise, but also achieving faster signal throughput. The various flash-programmable elements of the output drivers of the integrated circuit chip are programmed after fabrication of the chip based upon the voltage noise constraints of the specific environment of the chip, including the clock rate, form factor, packaging and type of peripheral devices.

REFERENCES:
patent: 4959564 (1990-09-01), Steele
patent: 5039874 (1991-08-01), Anderson
patent: 5194765 (1993-03-01), Dunlop et al.
patent: 5387824 (1995-02-01), Michelsen
patent: 5489858 (1996-02-01), Pierce et al.

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