Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Patent
1994-12-30
2000-08-29
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
36523008, 365203, 365233, 395878, 395845, G06F 1316
Patent
active
06112284&
ABSTRACT:
A memory controller having a data strobe that tracks the column access strobe signal in a computer system having Extended Data Out (EDO) DRAMs. The data strobe signal follows, by a predetermined delay, the column access strobe signal, and therefore any skew in the column access strobe signal is inherently included within the data strobe signal. As a result, the data can be latched out, responsive to said data strobe signal, at approximately the center of the valid window.
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Bains Kuljit S.
Hayek George R.
Kundu Aniruddha
Nardone Joe M.
Intel Corporation
Peikari J.
Swann Tod R.
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