Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Diffusing a dopant
Reexamination Certificate
1999-06-14
2001-12-11
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Diffusing a dopant
C438S545000, C438S550000, C438S557000
Reexamination Certificate
active
06329272
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the field of integrated semiconductor devices, and is directed to a method and apparatus for iteratively, selectively tuning (i.e. modifying, changing) the impedance of integrated semiconductor devices using a focussed heating source. More particularly, the invention relates to a method of selectively tuning the impedance of integrated semiconductor devices, by modifying the dopant profile of a region of low dopant concentration (i.e. increasing the dopant concentration) by controlled diffusion of dopants from one or more adjacent regions of higher dopant concentration through the melting action of a focussed heating source, for example a laser.
The use of lasers in the field of integrated semiconductor devices is known in the art, for example U.S. Pat. No. 4,636,404 to Raffle et al., U.S. Pat. No. 5,087,589 to Chapman, et al., U.S. Pat. No. 4,585,490 to Raffle et al. However, lasers in this field have mainly been used for creating links between various components, for implementing defect avoidance using redundancy in large random access memories and in complex VLSI circuits, and for restructuring or repairing circuits. For example, U.S. Pat. No. 4,636,404 uses a laser to create a conductive, low resistance bridge across a gap between laterally spaced apart metallic components in a circuit. U.S. Pat. No. 5,087,589 teaches of the creation of vertical conductive selected link regions after having performed ion implantation of the circuit.
Further, U.S. Pat. No. 5,585,490 is concerned with creating vertical links by connecting vertically spaced apart metal layers by exposing link points to a laser pulse. The use of lasers in the art in relation with integrated circuits is therefore mainly directed to the creation of conductive links and pathways where none existed before.
To accomplish the creation of conductive links between metal connectors, the prior art teaches the use of lasers capable of delivering a high intensity laser pulse. The heating action of the high-powered laser pulse cause breaks and fissures to appear in the silicon oxide (or other insulator) spacing apart the metal lines. The heating action of the laser pulse further causes some of the metal of the connectors to melt, which melted metal infiltrates into the fissures and cracks in the insulator, thus creating a link between the two connectors. The methods taught in the above patents therefore requires the application of a single, powerful laser pulse. Following the application of the since laser pulse, no further laser pulse is applied. Therefore, these patents are concerned only with the creation of low resistance links, i.e. laser diffusable links, and not with in any way accurately modifying the impedance across a given device.
Modifying the impedance or resistance of integrated semiconductor devices through the use of lasers is however known in the art. Such methods, sometimes known as laser trimming of integrated semiconductor devices is most often performed on a semiconductor device having a resistive thin film structure, manufactured with materials such as silicon cliromide, cesium silicides, tantalum nitride or nichrome. The trimming of the integrated semiconductor device, in order to achieve a required or desired resistance value is obtained by laser ablation, (i.e. by evaporation, or burning off), of a part of the resistive thin film. In other word, the laser is used to evaporate a portion of a resistive thin film structure, which due to the change in the amount of resistive thin film that remains, causes a change in the resistance value of the integrated semiconductor device.
This method comprises a number of disadvantages and limitations. One of the principal limitation of this method is that the final resistance value of the resistive thin film after the laser ablation depends on the film material itself, the quantity of material that is removed (i.e. evaporated) through laser ablation, and the pattern or shape of the ablated area. Thus if a large resistance change is required, a large area needs to be ablated, which may not be possible with the very small scale of some integrated circuits. Thus conventional laser ablation techniques generally do not allow for flexibility in any required change of resistance or impedance once the circuit has been designed and built. A further severe limitations of laser ablation technology lies in the fact that the resistive value of the trimmed device after ablation may not remain constant, and may change with time. This resulting change of the resistance value of the resistive thin film with time, which may be known as resistance drift, may be caused by a long term annealing effect of the laser ablated area. This long term annealing or “aging” effect may result from a slow decrease in the size of the thin film crystallites and may cause, with time, a significant rise of the film resistance value. This change is highly undesirable, as it may, through time, bring about a deterioration of the integrated circuit characteristics, in a field where even small variations in characteristics may not be acceptable.
A further disadvantage of laser trimming is that the ablation itself(or evaporation) of the thin film may result in damage to the surrounding integrated device. For example, residual material from the evaporation process (i.e. the material which is itself ablated or evaporated) may splatter adjacent components of the circuit, and therefore damage them. Further, the laser power output required for the resistive thin film evaporation can, in some instances, affect adjacent circuit elements by causing thermal damage, and can consequently induce unexpected and unwanted dysfunction of the integrated semiconductor device.
Further, standard manufacturing processes of integrated circuits may not include resistive thin film manufacturing steps. Therefore, additional deposition steps may be required to manufacture resistive thin film, thus increasing cost and complexity of the integrated device. Further, in some cases, a passivation layer may need to be deposited on the circuit after the laser trimming process in order to protect the resistive thin film from surrounding chemical contamination. These additional steps necessitate the use of additional manufacturing processes and therefore corresponding increased costs.
A further important disadvantage of known or conventional laser ablation techniques for trimming integrated resistors is the relatively large size of the thin film resistors themselves required in order to be able to successfully perform the ablation. In fact, due to manufacturing tolerances and other constraints, the size of the thin film may have to be much larger than the actual area which is to be ablated by laser. This wasted area surrounding the laser ablated area drastically reduces the efficiency of the architecture of the integrated circuit. Not only are unnecessary costs incurred in additional silicon, but large dimensions impose major restrictions, especially for high frequency integrated circuit elements. As miniaturization is of tremendous importance in the semiconductor industry, and as manufactures and users require ever smaller and more dense devices, laser ablation for trimming the resistance of integrated circuits becomes uneconomical, impractical, if not impossible.
Finally, a further disadvantage of known laser ablation techniques for modifying the resistance of integrated resistors is that known conventional laser trimming techniques can only increase the resistance value of the film, in other words, the technique can only work in one direction by increasing the resistance of the resistors. Known laser ablation techniques cannot lower the resistance of integrated resistors, and it therefore follows that if during the trimming procedure, over-trimming occurs and the achieved resistance is too high for the required use, there is no way of reversing this and trimming the resistance downwardly. Overtiming of a circuit may therefore cause the whole circuit to be scraped. Further, the
Gagnon Yves
Meunier Michel
Savaria Yvon
Brouillette Robert
Chaudhuri Olik
Kosie Ronald S.
Peralta Ginette
Technologies LTrim Inc.
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