Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-08-08
2006-08-08
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S048000, C714S006130, C714S052000
Reexamination Certificate
active
07089461
ABSTRACT:
A method, apparatus and computer program product are provided for implementing uncorrectable error isolation in a computer system while the system continues to run. A memory controller performs data fetching from a system memory, capturing error information, and responsive to detecting an uncorrectable error, generates a predefined attention to a service processor. The service processor utilizing a processor runtime diagnostic (PRD) program, reads the captured error data and identifies a memory extent with the uncorrectable error. Then the memory controller performs accelerated scrubbing of the identified memory extent with the uncorrectable error, capturing error information and responsive to a scrub correctable error threshold being exceeded, sends a predefined scrub threshold exceeded attention to the service processor. The service processor reads the captured error data and identifies a failed memory chip.
REFERENCES:
patent: 5339408 (1994-08-01), Bruckert et al.
patent: 6560725 (2003-05-01), Longwell et al.
Gilbert Douglas Ray
Hicks Raymond Leslie
Lemmon Wayne
Beausoliel Robert
Ehne Charles
Pennington Joan
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