Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
1999-04-26
2001-05-15
Yoo, Do Hyun (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S005000, C711S201000, C711S202000
Reexamination Certificate
active
06233662
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a method and apparatus for interleaving memory in a computer system.
BACKGROUND OF THE INVENTION
Computer memory interleaving is the process of spreading memory references across multiple memory banks to increase throughput of the memory system. Interleaving may be accomplished by computer hardware called an interleaver that translates physical addresses such as those from the processor into a specific location in a memory bank.
Typically, memory access may be interleaved across a number of memory banks, where the number of memory banks may change. For example, since a memory bank is associated with computer hardware such as a memory board, the number of memory boards in a computer may be altered over the life of the computer. Therefore, variable requirements related to the number of memory banks may be accommodated by software or firmware configuration operations. That is, software may write configuration information to control registers of the interleaver that manage the manner of dividing the address space among the memory banks. This configuration information is used by the interleaver to translate physical addresses into memory bank labels and memory bank offsets. It will be appreciated by those skilled in the art that offsets may be used to locate specific addresses within a range of addresses.
Generally, when the number of memory banks is not a power of two, current interleavers operate by approximating the number of memory banks available for interleaving to the nearest power of two that is not greater than the actual number of available memory banks. Typically the full potential for improving throughput of memory access by interleaving is not realized by interleaving over a smaller, power of two, number of memory banks.
Some interleavers are flexible and may allow variation in the degree of interleave, the size of the range of addresses, or the values that may be loaded in a bank list. However, configuration operations of current interleavers do not take advantage of some of the flexible features of this type of interleaver.
Further during the configuration process, some current interleavers operate by requiring as many configuration entries as there are available memory banks. Since the resources available to the interleaver for configuration is fixed and small, reduction of the number of configuration entries would improve the efficiency of interleaving.
SUMMARY OF THE INVENTION
The present invention advantageously optimizes the flexibility built into some interleavers by novelly configuring an interleaver to improve the throughput of access to computer memory by maximizing the number of banks used for interleaving the memory. The present invention configures an interleaver so that it operates across “N” memory banks where “N” is not required to be a power of two. Given an N-way interleaver, the present invention may use fewer than N entries and improves the approximation of the number of banks used for interleaving computer memory over prior art approximations.
The present embodiment of the invention is an interleaver configuration tool that may vary the configuration information of an interleaver related to the degree of interleave, the size of the range of addresses, or the values that may be loaded in a bank list to improve throughput of access to memory banks. While the present embodiment describes an interleaver configuration tool that operates in cooperation with an interleaver that may be configured by software or firmware, it will be appreciated that the present invention is not limited to interleavers of this specific type.
It is therefore an object of the invention to improve the process of spreading memory references across multiple memory banks to increase throughput of the memory system by novelly configuring the control registers of an interleaver in a computer system.
It is also an object of the invention to improve the throughput of memory access by interleaving over a number of available memory banks, where the number is not constrained to a power of two. That is, the current embodiment of the present invention may approximate the number of memory banks used for interleaving to the a number that is equal to or closer to the number of memory banks used for interleaving, than previous solutions that were constrained to a power of two.
It is yet another object of the invention to limit the number of entries required for configuration of an interleaver to less than the number of available memory banks thereby reducing the number of resources required to configure an interleaver.
It is yet another object of the invention to improve the efficiency of interleavers by configuring an interleaver by jointly configuring the entries in the configuration of the interleaver.
REFERENCES:
patent: 5293607 (1994-03-01), Brockmann et al.
patent: 5652861 (1997-07-01), Mayo et al.
patent: 5809555 (1998-09-01), Hobson
patent: 6070227 (2000-05-01), Rokicki
D.A. Patterson et al., “Computer Architecture A Quantitative Approach”, 2nd Edition, p. 430-439.
Hewlett--Packard Company
Namazi Mehdi
Yoo Do Hyun
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