Method and apparatus for interfacing to E1 or T1 networks

Details Method and apparatus for interfacing to E1 or T1 networks Method and apparatus for interfacing to E1 or T1 networks

2005-11-08

2005-11-08

Fan, Chieh M. (Department: 2634)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S356000, C375S354000, C375S220000

Reexamination Certificate

active

06963627

ABSTRACT:
An apparatus including a frame buffer memory; a set of frame synchronizers coupled to the frame buffer memory; and, a set of receivers coupled to the buffer memory and a corresponding frame synchronizer in the set of frame synchronizers. Each receiver is configured to receive a data stream having a first clock rate, and detect changes in the data stream using a second clock rate.

REFERENCES:
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patent: 5615237 (1997-03-01), Chang et al.
patent: 5956377 (1999-09-01), Lang
patent: 5974104 (1999-10-01), Dhara
patent: 6643788 (2003-11-01), Butler et al.
patent: 6775263 (2004-08-01), Hwang et al.
Daniel Minoli, Enterprise Networking: Fractional T1 to SONET, Frame Relay to BISDN, pp. 95-110, Library of Congress Cataloging-in-Publication Data, 1993 Artech House, Inc.Norwood MA.

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