Method and apparatus for interconnecting content addressable...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Reexamination Certificate

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07062601

ABSTRACT:
A cam system comprising a plurality of CAM devices connected in a serial cascade arrangement, the CAMS in the cascade being connected to an adjacent CAM by a respective forwarding bus, with at most a first CAM in the cascade being connected to a receive data signals from a host controller and at most a last CAM devices being coupled to forward results back to the host controller; and a send signal generation means for supplying a SEND signal to the last CAM; the SEND signal for co-ordinating transfer of the search result from the last CAM to the host controller, the serial cascade arrangement minimising the number of CAMs being connected to a common forwarding bus.

REFERENCES:
patent: 6253284 (2001-06-01), Hsu
patent: 6317350 (2001-11-01), Pereira et al.
patent: 6763426 (2004-07-01), James et al.
patent: 6775166 (2004-08-01), McKenzie et al.
patent: 6876558 (2005-04-01), James et al.
patent: 2003/0065880 (2003-04-01), Gordon et al.

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