Method and apparatus for injecting an error into a waveform...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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C702S066000, C702S124000

Reexamination Certificate

active

06631481

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to error detection and recovery in data processing systems. More particularly, this invention relates to the controlled insertion of low level errors into a data processing system through distortion of signal waveforms sent over a data link in the system. With this technique, the ability of system devices to detect and recover from such low level errors can be determined.
BACKGROUND
Necessary to any data processing system—whether a multiprocessor system, a uniprocessor system, a local area network, etc.—are the means for interconnecting the system devices. Physically, these means include data links, such as fiber optic or coaxial cable, electrical wire or other media, and interface control units at each end of the data link. The interface control unit provides a logical handshake to a system device to allow the system devices to communicate with each other over the data link. The logical handshake provides initialization, transfer of data, administrative tasks, error recovery, and re-initialization. Communication between system devices follows a protocol such as defined in a number of standards including Fibre Channel, Gigabit Ethernet, FDDI (Fiber Distributed Data Interface), and SONET (Synchronous Optical Network). Interface control units vary in name and design and may include parallel-to-serial transducers, such as GLMs (gigabit linking modules) or serial-serial transducers, such as GBICs (gigabit interface converters), which are installed on adapter cards in system devices or directly on system motherboards. An interface control unit typically includes physical media, an encoding layer, and a network protocol generator.
Critical to any data processing system is its ability to detect and recover from errors that occur within it. Test systems presently exist for determining whether a particular system device can detect certain types of errors. Finisar Corporation of Mountain View, Calif., and Ancot Corporation of Menlo Park, Calif., for example, offer several test systems for injecting higher-level errors into Fibre Channel networks in real time. Injected errors are created by making changes to bits, bytes, words, or frames, and they mimic the errors caused by digital logic or a bus within a system device. Such test systems test the ability of a system device to recover from errors of the type that may be generated in its logic or data path circuitry.
These test systems, however, cannot create and inject errors at the lower, physical level, that is, errors caused by distortion in waveforms that carry data over a data link. This type of error may or may not produce an invalid digital value. Such distortion is typically caused by ground plane noise from power system reset events, degraded lasers with spurious transient faults, breaks in cable or wiring, and other events that degrade, interfere or otherwise impact the waveform. For example, a poor quality laser diode may exhibit characteristics of self pulsation, which results in undecipherable characters being presented at the transceiver. The detection and tolerance to such physical perturbations depends upon the system device design, including the design of the receive circuitry, the phase lock loop, clock recovery circuit, the PCB dielectric material integrity, and the ASIC layout. But because present test systems cannot create actual errors of this type, they cannot test the ability of a system device to detect and recover from them.
A simple way to inject such errors is to insert into the system a faulty interface control unit that distorts signal waveforms being transmitted or received on a data link. But faulty interface control units (or other devices, in general) do not inject errors consistently and repeatedly, making it difficult to construct an environment for testing the response of a system device to errors created by distorted waveforms.
An objective of the invention, therefore, is to provide a method and means for reliably creating a distorted signal waveform of desired characteristics (such as by distorting the waveform's amplitude and frequency) and for inserting the distorted waveform into a data processing system. With such a method, a test system can determine the ability of system devices to detect and correct for errors in such a waveform.
SUMMARY
In accordance with the invention, a method for injecting an error into a waveform sent over a data link comprises the following: The data link is monitored for a control event in the waveform. In response to the control event, a control signal is generated. In response to the control signal, the waveform is distorted, thereby injecting an error into it.
The method can be applied in a number of ways. For example, different control events can be chosen, including fill words, start-of-frame or end-of-frame delimiters, or other recognizable portions of a waveform whether before or after the data field. The distortion applied to the waveform can take the form of amplitude or frequency distortion, or both. The method is applicable to electrical, optical, or other types of signals. Selected parts of a waveform can be distorted by introducing delay into the method, such as delay in generating the control signal, delay in generating the distortion, or delay in transmitting the waveform. The distorted waveform may also be viewed and captured for later analysis and comparison with an undistorted waveform.
The methods of the invention can be implemented in an number of ways, such as in an error injector that is coupled into a data link within the system under test.
These and other aspects of the invention are more fully described below with reference to an illustrative embodiment.


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“Real-Time System Level Error Injection Module,”Jammer Module, Finisar Corporation (published prior to filing date of application).
“Simultaneous Multiport Protocol Analysis,”App Note GT-A98A Multianalyzer Feature, Finisar Corporation (published prior to filing date of application).
“Trace View FC-2 and SCSI Decode,”App Note GT-TV98A Protocol View, Finisar Corporation (published prior to filing date of application).
“FCT-5500 Fibre Channel Generator,” Ancot Corporation (published prior to filing date of application).
“FCT-5500 Fibre Channel Generator,” http://www.ancot.com/fcproducts/5500/5500html, (Jun. 2, 1999).
“FCAccess 1000 Fibre Channel Analyzer,” Ancot Corporation (published prior to filing date of application).
“FCAccess 1000 Fibre Channel Analyzer,” http://www.ancot.com/fcproducts/1000/1000.html, (Jun. 2, 1999).
“GTX-B Bit Error Rate Tester; The Extended Physical Layer Verification System,” Finisar Corporation (product described in publication in public use prior to filing date of application).
“Silkworm 2400 and 2800; Fibre Channel fabric switches,” BROCADE (published prior to filing date of application).

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