Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-06-12
2007-06-12
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C324S764010, C702S118000
Reexamination Certificate
active
10280458
ABSTRACT:
A JTAG-compatible device includes a unique identifier stored in dedicated non-volatile memory, a test access port (TAP) controller, a TAP instruction register, a dedicated data register, and a comparison block. The TAP instruction register enables and/or disables TAP instruction execution by the device. The dedicated data register is of a length that is the same or a subset of the length of the unique identifier. The comparison block can be an arithmetic logic unit (ALU) or other circuitry that compares a code scanned into the dedicated data register with the unique identifier stored in a PROM. The TAP controller can selectively ignore TAP commands if a code scanned into dedicated data register does not match the stored unique identifier. This allows the TAP controller to conditionally or independently control several devices that are connected in parallel. The unique identifier can be device-specific, device type-specific, and/or device configuration specific.
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Iovino Gregory M.
Parker Rachael J.
Beausoliel Robert
Blakely , Sokoloff, Taylor & Zafman LLP
Guyton Philip
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