Method and apparatus for increasing memory read access speed usi

Details Method and apparatus for increasing memory read access speed usi Method and apparatus for increasing memory read access speed usi

1996-05-16

1997-09-16

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Differential sensing

365 49, 365205, 365208, G11C 702

Patent

active

056687664

ABSTRACT:
Double-sensing of a data store being read to increase overall memory read access speed. An indicator signal coupled to the data store being read is responsive to a value stored in the data store. A first sense amplifier has a first input coupled to the indicator signal, a second input coupled to receive a first sense enable signal at a first sense time and an output coupled to provide a first indicated data value responsive to the first sense enable signal and the indicator signal. A second sense amplifier has a first input coupled to the indicator signal, a second input coupled to receive a second sense enable signal at a second sense time, and an output coupled to provide a second indicated data value responsive to the second sense enable signal and the indicator signal.
In one embodiment, a first input of a comparator is coupled to the output of the first sense amplifier and a second input of the comparator is coupled to the output of the second sense amplifier. An output of the comparator is coupled to a signal which invalidates the first indicated value if the first indicated value sensed at the first sense time is different than the second indicated value sensed at the second sense time.

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patent: 5307317 (1994-04-01), Shiraishi et al.
patent: 5422781 (1995-06-01), DiMarco
patent: 5455802 (1995-10-01), McClure

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