Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-03-30
2004-04-20
Alejandro-Mulero, Luz (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C216S067000
Reexamination Certificate
active
06723654
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to a method and apparatus for forming via holes in a photoresist and a passivation layer on a semiconductor structure and more particularly, relates to a method and apparatus for in-situ descum/hot bake/dry etch via holes in a photoresist and a passivation layer on top of a semiconductor structure.
BACKGROUND OF THE INVENTION
In the fabrication of modern semiconductor devices, via holes and trench openings are frequently formed in insulating material layers for providing electrical communication between various devices formed on a substrate. The formation of such via holes or trench openings include the steps of patterning by using a mask, photolithograph for reproducing the pattern, and various etching techniques for forming the openings in the insulating material layer.
In modern photolithography, a photosensitive polyimide material is frequently used as the photoresist layer due to its availability, cost, and easy processing characteristics. Since polyimide is an insulating material with an acceptable dielectric constant, polyimide affords the additional processing flexibility of being left in the semiconductor structure without being removed. This presents another processing advantage in that a photoresist removal step can be saved.
When a polyimide layer is patterned for etching the underlying passivation layer, a pre-treatment process of the polyimide layer by using oxygen plasma is normally required before a dry etching step. The purpose of the oxygen treatment process is to remove any residual, undeveloped polyimide material, or commonly known as polyimide or photoresist scum. The presence of the photoresist or polyimide scum could induce poor pattern transfer from the photoresist to the etched layer. The pre-treatment process is necessary in most via hole and trench opening formation process, and is particularly needed in a via dry etching process and a polyimide passivation etching process.
Conventionally, the oxygen plasma descum process is carried out in two separate process chambers, i.e. a descum process in the first chamber and a hot bake process in the second chamber. The processes therefore increase the product cycle time resulting in a waste of machine capacity. This is shown in FIGS.
1
A~
1
C. On a conventional semiconductor structure
10
, a polyimide photoresist layer
12
is deposited on an inter-metal-dielectric (IMD) layer
14
and a substrate
16
and is patterned by an imaging and developing process. Undeveloped photoresist material, or polyimide scum
18
may be left at the bottom of the photoresist opening
20
formed.
FIG. 1B
illustrates an oxygen plasma descum process in which oxygen plasma ions are bombarded into the photoresist opening
20
for oxidizing the polyimide scum
18
. After the descum process is completed, as shown in
FIG. 1C
, a dry etch step can be carried out to form a via opening in the IMD layer
14
.
The conventional process flow for either a via etch process or a polyimide passivation etch process can be shown in
FIGS. 2 and 3
.
FIG. 2
illustrates a process flow for a conventional via etch process wherein a photoresist layer is first descumed in Step
22
after patterning to remove all residual, undeveloped photoresist material. The semiconductor structure is then hot baked, typically on a hot plate for a specific length of time to drive out residual moisture or solvent from the photoresist layer and the passivation layer. This is shown in Step
24
. After a successful hot bake process is conducted, a via hole can be formed by a dry etch Step
26
before the photoresist layer is stripped away.
In a conventional process for polyimide passivation etch, as shown in
FIG. 3
, the photoresist layer is first hot baked in Step
28
, typically on a hotplate, and then dry etched in Step
30
, typically by a plasma etching or reactive ion etching technique before the photoresist layer is stripped. The conventional via forming process, as shown in
FIG. 2
, therefore requires three separate steps which must be run in three different process chambers and therefore, is a high cost fabrication process. In the polyimide passivation etch process, two separate steps are required which must be carried out in two different process chambers. Moreover, when a hot bake process is necessary, as shown in either
FIG. 2
or
FIG. 3
, the semiconductor structure must be processed in a hotplate apparatus for driving away the moisture content or the residual solvent content in the structure. After a hot bake process, the wafer may be left in the atmosphere for some time to wait for the subsequent etching process. This waiting time, or commonly known as Q-time, must be relatively short. Otherwise, the photoresist layer must again be hot baked due to the absorption of environmental moisture.
It is therefore an object of the present invention to provide an in-situ descum/hot bake/dry etch process for a polyimide photoresist layer that does not have the drawbacks or shortcomings of the conventional methods.
It is another object of the present invention to provide a method for in-situ descum/hot bake/dry etch a polyimide photoresist layer in a single process chamber without the need of three process chambers.
It is a further object of the present invention to provide a method for in-situ hot bake/dry etch polyimide and passivation layers in a single process chamber without the need of two separate process chambers.
It is still another object of the present invention to provide a method for in-situ hot bake/dry etch a metal layer in a single process machine without the need of two separate process machines.
It is still another object of the present invention to provide a method for in-situ descum/hot bake/dry etch a polyimide photoresist layer and a passivation layer in a single process chamber by generating an oxygen plasma for the descum process, flowing a heated inert gas onto a wafer backside for the hot back process, and flowing a cooling inert gas onto the wafer backside for the dry etch process.
It is yet another object of the present invention to provide a process chamber for conducting in-situ, a descum, a hot bake, and a dry etch process sequentially in the same process chamber.
It is still another further object of the present invention to provide a process chamber for conducting in-situ a descum, a hot bake and a dry etch process that is equipped with a cooling means for flowing a cooled fluid onto a wafer backside and a heating means for flowing a heated fluid onto the wafer backside.
It is yet another further object of the present invention to provide a process chamber for conducting in-situ a descum, a hot bake and a dry etch process sequentially in the same chamber that is equipped with a plasma generating means for both the descum and the dry etch process.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method and an apparatus for in-situ descum/hot bake/dry etch a polyimide photoresist layer and a passivation layer in a single process chamber are provided.
In a preferred embodiment, a method for in-situ descum/hot bake/dry etch a polyimide photoresist layer and a passivation layer in a single process chamber can be carried out by the steps of providing a process chamber that is equipped with a wafer platform and a wafer backside heating and cooling device; positioning a wafer that has a passivation layer and a patterned polyimide photoresist layer on top of the wafer platform; generating an oxygen plasma in the chamber conducting a descum process; flowing a heated inert gas onto a backside of the wafer conducting a hot bake process; and flowing a cooling inert gas onto the wafer backside conducting a dry etch process for forming a via opening in the wafer.
The method for in-situ descum/hot bake/dry etch a polyimide, photoresist layer and a passivation layer in a single process chamber may further include the step of conducting the descum process for a time period of less than 30 sec., or the step of conducting the hot bake process for a time period of a
Chang Kuei-Jen
Hwang Yuan-Ko
Lin Juei-Wen
Tseng Jen-Yung
Alejandro-Mulero Luz
Taiwan Semiconductor Manufacturing Co. Ltd
Tung & Associates
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