Coating processes – Direct application of electrical – magnetic – wave – or... – Pretreatment of coating supply or source outside of primary...
Reexamination Certificate
2000-06-30
2001-09-18
Mills, Gregory (Department: 1763)
Coating processes
Direct application of electrical, magnetic, wave, or...
Pretreatment of coating supply or source outside of primary...
C118S7230ER
Reexamination Certificate
active
06291028
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the deposition of thin films during wafer processing. More specifically, the present invention relates to a method and apparatus for improving the quality of a film's interface when the film is deposited by plasma enhanced chemical vapor deposition methods.
One of the primary steps in the fabrication of modern semiconductor devices is the formation of a thin film on a semiconductor substrate by chemical reaction of gases. Such a deposition process is referred to as chemical vapor deposition or “CVD.” Conventional thermal CVD processes supply reactive gases to the substrate surface where heat-induced chemical reactions take place to produce a desired film. The high temperatures at which some thermal CVD processes operate can damage device structures having metal layers. Plasma enhanced CVD (PECVD) processes on the other hand, promote excitation and/or disassociation of the reactant gases by the application of radio frequency (RF) energy to a reaction zone proximate the substrate surface, thereby creating a plasma of highly-reactive ionic species. The high reactivity of the released species reduces the energy required for a chemical reaction to take place, and thus lowers the required temperature for such CVD processes. The relatively low temperature of a PECVD process makes such processes ideal for the formation of insulating layers over deposited metal layers and for the formation of other insulating layers.
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called “Moore's Law”) which means that the number of devices which will fit on a chip doubles every two years. Today's wafer fabrication plants are routinely producing 0.5 and even 0.35 micron feature size devices, and tomorrow's plants soon will be producing devices having even smaller geometries.
As device sizes become smaller and integration density increases, issues which were not previously considered important by the industry are becoming of concern. One such issue is the resistance of deposited films to defects such as cracking, void formation or the like which may be caused by phenomenon such as outgassing. One particular source of outgassing molecules is the initially deposited interface of film. Generally, the interface of the film has more impurities and imperfections than the bulk layer of the film and is therefore more porous than the bulk of the film. The porous nature of the film interface leads to unstable atoms which are not tightly bound within the silicon lattice structure. Thus, the film interface may be a source of outgassing molecules or atoms. The porous interface may also be a source of moisture collection.
In prior art devices, one source of impurities at the film interface is from incomplete reactions that occur in the plasma as RF power is increased to full power. For example, in deposition of a silicon oxide layer, a plasma is formed from a process gas released into a processing chamber by applying RF power to the chamber. In known prior art processes, the process gas is introduced into the chamber and then RF power is applied. While it generally only takes a matter of seconds for RF power to be ramped up from off to full power, reactions that take place during this period of partial power tend to be incomplete, thus depositing a film having a relatively high impurity level as compared to the film deposited under full RF power.
From the above it can be seen that a film having an improved film quality at the interface is necessary to keep pace with emerging technologies. It can also be seen that a method is needed to stabilize silicon oxide and similar films and prevent moisture absorption and outgassing in the films.
SUMMARY OF THE INVENTION
The present invention addresses the above problems of the prior art by providing an insulating layer having improved film quality at the interface. The present invention also provides a method and apparatus for forming such an insulating layer.
In particular, the present invention provides a method of reducing the incomplete reactions described above by delaying the introduction of reactant gases until after the plasma has been brought to full power. Specifically, in one embodiment of the method of the present invention, a plasma is formed from an inert gas introduced into the processing chamber. RF power used in plasma formation is brought from off to full power with the inert gas in the chamber. Once RF power reaches its full power, reactant gases are introduced.
In a preferred embodiment of the present invention, a first reactant gas, which by itself is an insufficient source for deposition, is introduced along with the inert gas until RF power is brought to full power. After full RF power is reached, remaining reactant gases are introduced to effect plasma deposition.
In another embodiment of the present invention, the total flow rate at which gases are introduced into the chamber while RF power is being brought to full power is substantially equal to the total flow rate at which gases are introduced into the chamber to deposit the bulk film layer.
These and other embodiments of the present invention along with many of its advantages and features are described in more detail in conjunction with the text below and attached figures.
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Bhan Mohan K.
Gupta Anand
Rana Virendra V. S.
Subrahmanyam Sudhakar
Verma Amrita
Applied Materials Inc.
Hassanzadeh P.
Mills Gregory
Townsend & Townsend & Crew
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