Method and apparatus for improving stability of a 6T CMOS...

Details Method and apparatus for improving stability of a 6T CMOS... Method and apparatus for improving stability of a 6T CMOS...

2005-11-29

2005-11-29

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000

Reexamination Certificate

active

06970373

ABSTRACT:
The present invention is a CMOS SRAM cell comprising two access devices, each access device comprised of a tri-gate transistor having a single fin; two pull-up devices, each pull-up device comprised of a tri-gate transistor having a single fin; and two pull-down devices, each pull-down device comprised of a tri-gate transistor having multiple fins. A method for manufacturing the CMOS SRAM cell, including the dual fin tri-gate transistor is also provided.

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T. Ludwig et al., “FinFET Technology for Future Microprocessors” 2003 IEEE, pp. 33-34.
International Search Report PCT/US2004/032442.

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