Method and apparatus for implementing virtual memory having mult

Details Method and apparatus for implementing virtual memory having mult Method and apparatus for implementing virtual memory having mult

1995-06-06

1996-09-10

Moore, David K.

395418, G06F 926, G06F 934, G06F 1200, G06F 1202

Patent

active

055553877

ABSTRACT:
A method and apparatus for implementing virtual memory having multiple selected page sizes are provided. A virtual address includes a map index and a frame offset. A selector mechanism receives the virtual address frame offset and generates an offset and index. A frame map table indexes the virtual address map index and the selector generated index and generates a base address. The frame map table generated base address and the selector generated offset are combined to provide a physical address.

REFERENCES:
patent: 4747044 (1988-05-01), Schmidt et al.
patent: 4851989 (1989-07-01), Kagimasa et al.
patent: 5012408 (1991-04-01), Conroy
patent: 5125086 (1992-06-01), Perazzoli, Jr.
patent: 5237673 (1993-08-01), Orbits et al.
patent: 5247632 (1993-09-01), Newman
patent: 5247638 (1993-09-01), O'Brien et al.
patent: 5446854 (1995-08-01), Khalidi et al.
Computer Organization and Design, Hennessy et al, 1994, pp. 481-503.
IBM Technical Disclosure Bulletin, vol. 37, No. 07 Jul. 1994.

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