Electrical computers and digital processing systems: processing – Processing control – Context preserving (e.g. – context swapping – checkpointing,...
Reexamination Certificate
2005-11-15
2005-11-15
Coleman, Eric (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
Context preserving (e.g., context swapping, checkpointing,...
Reexamination Certificate
active
06965986
ABSTRACT:
A method and apparatus are provided for implementing two-tiered thread state multithreading support with a high clock rate. A first tier thread state storage stores a limited number of runnable thread register states. The limited number is less than a threshold value. Next thread selection logic coupled between the first tier thread state storage and a currently executing processor state, picks a next thread to run on a processor from the limited number of runnable thread register states. A second tier thread storage facility stores a second number of thread states that is greater than the limited number of runnable thread register states. A runnable thread selection logic coupled between the first tier thread state storage and the second tier thread storage facility, selectively exchanges thread states between the first tier limited number of runnable thread register states and the second tier thread storage facility.
REFERENCES:
patent: 5766515 (1998-06-01), Jonas et al.
patent: 5771382 (1998-06-01), Wang et al.
patent: 5812811 (1998-09-01), Dubey et al.
patent: 5815727 (1998-09-01), Motomura
patent: 5872963 (1999-02-01), Bitar et al.
patent: 6212544 (2001-04-01), Borkenhagen et al.
patent: 6223208 (2001-04-01), Kiefer et al.
patent: 6662204 (2003-12-01), Watakabe et al.
U.S. Appl. No. 10/246,912, filed Sep. 19, 2002.
“Method and Apparatus for Implementing Thread Replacement for Optimal Performance in a Two-Tiered Multithreading Structure”.
Kossman Harold F.
Mullins Timothy John
Coleman Eric
Pennington Joan
LandOfFree
Method and apparatus for implementing two-tiered thread... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for implementing two-tiered thread..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for implementing two-tiered thread... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3471250