Computer graphics processing and selective visual display system – Computer graphics display memory system – Cache
Reexamination Certificate
2000-01-10
2003-10-14
Bella, Matthew C. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Cache
C345S552000, C345S530000, C711S118000, C711S119000
Reexamination Certificate
active
06633299
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention generally relates to cache management and graphics data processing and more specifically relates to managing a cache utilized for processing graphics data.
2. Description of the Related Art
Computer systems have long used cache memory to store information which the processor is likely to attempt to access again soon. It is well known that if information will be used again, it is likely to be used again by a computer soon after it is initially used. While this is certainly not an absolute condition, it is a well-accepted rule of thumb. Caches are typically organized as a set of entries or cache lines and a corresponding set of tags. When a piece of information is requested from memory, the address at which the information is stored is compared with the tags in the cache. If a hit (comparison where a tag matches the address) occurs, the entry corresponding to the tag is retrieved. If a miss occurs, the request proceeds to memory (or continues at memory in parallel). Caches may be fully associative, in which the tag identifies a single entry, or may be set-associative, in which the tag identifies a set of entries, one entry of which will likely correspond to the part of the set of entries sought when a match occurs.
More recently, graphics systems have used caches for a similar purpose, storing graphics data that is likely to be used again soon. However, efficient use of caches for graphics data is an area that has yet to be seriously developed.
Typically, graphics systems render 3D objects using triangles, perform transformations, blend multiple sources of graphics data to a single picture, or display 2D images. To do this, the graphics system reads data (typically pixels) from a memory and stores the data into the cache. Then, if the data is needed again soon, the data may be accessed from the cache. Alternatively, if the data is not needed again soon, it is typically flushed from the cache so that more recently accessed data may be stored in the cache. The data is typically flushed from any cache in an LRU (least recently used) order, such that the entries in the cache (the cache lines) that have been stored there the longest are replaced first.
SUMMARY OF THE INVENTION
In one embodiment, the invention is a method. The method includes monitoring a data stream. The method also includes partitioning a cache into two sub-caches based on monitoring the data stream.
REFERENCES:
patent: 5537570 (1996-07-01), Tran
patent: 5805854 (1998-09-01), Shigeeda
patent: 5875465 (1999-02-01), Kilpatrick et al.
patent: 6038645 (2000-03-01), Nanda et al.
patent: 6173367 (2001-01-01), Alekesic et al.
patent: 6460122 (2002-10-01), Otterness et al.
patent: 6498605 (2002-12-01), Abdallah
Piazza Tom
Sreenivas Aditya
Sreenivas Krishnan
Bella Matthew C.
Intel Corporation
Singh Dalip
LandOfFree
Method and apparatus for implementing smart allocation... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for implementing smart allocation..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for implementing smart allocation... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3165722