Method and apparatus for implementing power saving mode

Details Method and apparatus for implementing power saving mode Method and apparatus for implementing power saving mode

1997-01-22

1999-07-20

Ray, Gopal C.

Electrical computers and digital processing systems: support

Computer power control

Power conservation

713310, 713321, 713330, G06F 132

Patent

active

059251328

ABSTRACT:
A device control apparatus and a corresponding method allow the smooth recovery from a power saving mode to a stand-by state without malfunction. When the power saving mode is on and a signal which causes the release of the power saving mode is received, an output of a sleep mode release signal is temporarily driven low. After a first predetermined time period has elapsed, a power supply and an oscillation device are started. After a second predetermined time, a sleep state of a control unit is released, and the device is returned to a stand-by state.

REFERENCES:
patent: 5404541 (1995-04-01), Hirosawa et al.
patent: 5454114 (1995-09-01), Yach et al.
patent: 5675810 (1997-10-01), Sellers
patent: 5721936 (1998-02-01), Kikinis et al.
patent: 5768602 (1998-06-01), Dhuey

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