Method and apparatus for implementing locking of non-data...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

Reexamination Certificate

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Details

C711S154000, C711S206000

Reexamination Certificate

active

06467033

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the data processing field, and more particularly, relates to a method and apparatus for implementing locking of non-data page operations in a memory system.
DESCRIPTION OF THE RELATED ART
In a memory system it is desirable to minimize memory latency and to provide improved efficient performance.
One known memory system includes a compressed data structure utilizing indirect addressing and a mechanism of manipulating data in system memory at a page level by manipulating translation table entries. These manipulations involve such operations as copies, moves, clears, and the like. In this compressed memory system, a fetch of a translate table entry must be made in order to access the requested data. These entries may be kept in a look aside buffer to prevent refetching for future accesses to the same page. When an entry in a look aside buffer has been invalidated by a page operation (op) future processor or I/O accesses to that same page requires performing a new memory fetch of the compression translate table entry.
A need exists for a method and apparatus to minimize memory latency and to provide improved efficient performance. It is desirable to provide a method and apparatus for implementing locking of non-data page operations in a memory system. It is desirable to provide such a method and apparatus for implementing locking of non-data page operations that provides improved efficient performance and that minimizes memory latency.
SUMMARY OF THE INVENTION
Important objects of the present invention are to provide an improved method and apparatus for implementing locking of non-data page operations in a memory system, to provide such apparatus and method substantially without negative effects and that overcome many disadvantages of prior art arrangements.
In brief, a method and apparatus are provided for implementing locking of non-data page operations in a memory system. In the method for implementing locking of non-data page operations of the invention, checking for a look aside buffer invalidate request is performed. Responsive to identifying a look aside buffer invalidate request, a real address is locked for the look aside buffer invalidate request. Then checking for a non-data page operation is performed. Responsive to identifying a non-data page operation, checking for the non-data page operation to complete is performed. Responsive to identifying the completed non-data page operation, the real address is unlocked for the look aside buffer invalidate request.
In accordance with features of the invention, only a lock is placed on the page for a non-data page operation. A look aside buffer invalidate sequence is not performed for the non-data page operation.


REFERENCES:
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patent: 5790804 (1998-08-01), Osborne
patent: 6076157 (2000-06-01), Borkenhagen et al.
patent: 6161208 (2000-12-01), Dutton et al.
patent: 6212544 (2001-04-01), Borkenhagen et al.
patent: 6385694 (2002-05-01), Arimilli et al.
patent: 6397300 (2002-05-01), Arimilli et al.

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