Method and apparatus for implementing engineering change orders

Details Method and apparatus for implementing engineering change orders Method and apparatus for implementing engineering change orders

2006-02-28

2006-02-28

Smith, Matthew (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C700S105000, C707S793000, C707S793000

Reexamination Certificate

active

07007248

ABSTRACT:
A tool and method for implementing engineering change orders. The tool and method provides that a change file is checked, equivalent engineering change orders are computed and applied to an active cell. The engineering change orders are registered with a pre-determined tool name, and it is detected and reported if another tool needs to be run to restore routing information. The active cell is not automatically saved after the engineering change orders are applied. Instead, a user must manually save the active cell after the tool is run. The tool can work with three different name spaces: Verilog, VHDL and Avant! Verilog.

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