Method and apparatus for implementing dynamic display memory

Details Method and apparatus for implementing dynamic display memory Method and apparatus for implementing dynamic display memory

2001-11-05

2003-11-18

Chauhan, Ulka J. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Graphic display memory controller

C345S536000, C345S568000, C711S203000, C711S206000

Reexamination Certificate

active

06650332

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to graphics chipsets and more specifically to management of graphics memory.
2. Description of the Related Art
It is generally well known to have a graphics subsystem which can control its own memory, and such subsytems are typically connected to a CPU, main memory, and other devices such as auxiliary storage devices by way of a system bus. Such a system bus would be connected to the CPU, main memory, and other devices. This allows the CPU access to everything connected to the bus. Graphics subsystems often include high speed memory only accessible through the graphics subsystem. Additionally, such subsystems often may access operands in main memory, typically over the system bus.
In such systems, a CPU will often have to perform operations on graphics operands. However, the organization of these operands will be controlled by the graphics subsystem. This requires that the CPU get the operands from the graphics subsystem. Alternatively, the CPU or an associated memory management unit (MMU) may control the organization of graphics operands, in which case the graphics subsystem must get data from the CPU or MMU in order to operate. In either case, some level of inefficiency is introduced, as one device must request data from the other device in order to perform its tasks.
In other systems, both the CPU and the graphics subsystem will control organization of the graphics operands. In these systems, while the CPU and the graphics subsystem will not need to request operands from each other, they will need to inform each other of when graphics operands are moved in memory or otherwise made inaccessible. As a result, increased overhead is introduced into every operation on a graphics operand.
FIG. 1
illustrates a prior art system. It includes Graphics Address Transformer
100
(GAT
100
) connected to Graphics Device Controller
120
(GDC
120
) which in turn is connected to Graphics Device
130
. GAT
100
is also connected to a bus which connects it to Main Memory
160
, Auxiliary Storage
170
and Memory Management Unit
150
(MMU
150
). Central Processing Unit
140
(CPU
140
) is connected to MMU
150
and thereby accesses Main Memory
160
and Auxiliary Storage
170
. CPU
140
also has a control connection to GAT
100
which allows CPU
140
to control GAT
100
. Main Memory
160
includes Segment Buffer
110
.
CPU
140
operates on graphics operands stored in Main Memory
160
and Auxiliary Storage
170
. To facilitate this, MMU
150
manages Main Memory
160
and Auxiliary Storage
170
, maintaining records of where various operands are stored. When operands are moved within memory, MMU
150
updates its records of the operands' locations. GDC
120
also operates on graphics operands stored in Main Memory
160
and Auxiliary Storage
170
. To facilitate this, GAT
100
maintains records of where graphics operands are stored and updates these records when operands are moved within memory. As a result, whenever CPU
140
or GDC
120
perform an action that results in movement of graphics operands, the records of both MMU
150
and GAT
100
must be updated. Maintaining coherency between the records of MMU
150
and GAT
100
requires highly synchronized operations, as many errors can be encountered in accessing either Main Memory
160
or Auxiliary Storage
110
.
For example, CPU
140
may move a segment of memory from Auxiliary Storage
170
to Segment Buffer
110
of Main Memory
140
, thereby overwriting the former contents of Segment Buffer
110
. If such an action occurs, MMU
150
will update its records, thereby keeping track of what operands are in Segment Buffer
110
, and what operands that were in Segment Buffer
110
are no longer there. If any of these operands are graphics operands, then CPU
140
must exert control over GAT
100
, forcing GAT
100
to update its records concerning the various graphics operands involved. Furthermore, if GDC
120
was accessing Segment Buffer
110
when CPU
140
overwrote Segment Buffer
110
, GDC
120
may now be operating on corrupted data or incorrect data.
SUMMARY OF THE INVENTION
The present invention is a method and apparatus for implementing dynamic display memory. One embodiment of the present invention is a memory control hub suitable for interposition between a central processing unit and a memory. The memory control hub comprises a graphics memory control component and a memory control component.


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