Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
1999-03-31
2001-07-17
Verbrugge, Kevin (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
Reexamination Certificate
active
06263408
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the data processing field, and more particularly, relates to a method and apparatus for implementing automatic cache variable update.
DESCRIPTION OF THE RELATED ART
Computer have become increasingly faster and one of the ways in which to increase the speed of computers is to minimize storage access time. In order to reduce data access time, special purpose high-speed memory spaces of static random access memory (RAM) called a cache are used to temporarily store data which are currently in use. For example, a processor cache typically is positioned near or integral with the processor. Data stored in the cache advantageously may be accessed by the processor in only one processor cycle retrieving the data necessary to continue processing; rather than having to stall and wait for the retrieval of data from a secondary memory, such as a higher level cache memory or a direct access storage device.
Storage devices often use a cache to speed access to stored data. The cache retains data transmitted to and from a requesting device or data that may be requested in the future. To retrieve data from the cache, the storage device must maintain variables that indicate what data is valid in the cache. These variables are typically maintained by software at the beginning or end of a transfer. Therefore, the variables do not match the segment contents during the transfer, a cause for data integrity exposures. The software must update the variable for each transfer completed to the requester, adding overhead to the code execution time which slows product performance.
SUMMARY OF THE INVENTION
A principal object of the present invention is to provide an improved method and apparatus for implementing automatic cache variable update. Other objects are to provide method and apparatus for implementing automatic cache variable update substantially without negative effects and that overcomes many of the disadvantages of prior art arrangements.
In brief, a method and apparatus are provided for implementing automatic cache variable update. A cache variable update hardware maintains a plurality of variables indicative of a data segment in the cache. The plurality of variables include a segment state variable, a segment starting address variable, a segment length variable and a segment offset variable. The cache variable update hardware monitors the cache to identify a selection of a segment for a data transfer to and from the cache and to identify data transfers. The plurality of variables are initialized responsive to an identified cache search. The segment length variable is incremented responsive to a data block written to the cache and the segment state variable is modified responsive to a data transfer complete.
REFERENCES:
patent: 5349651 (1994-09-01), Hetherington et al.
patent: 5829039 (1998-10-01), Sugino et al.
patent: 5946708 (1999-08-01), Fang et al.
patent: 5974508 (1999-10-01), Maheshwari
patent: 6009533 (1999-12-01), Zick
patent: 6128717 (2000-10-01), Harrison et al.
patent: 6141728 (2000-10-01), Simionescu et al.
patent: 6145055 (2000-11-01), Fujimoto
Anderson Clark Alan
Berning Lynn Charles
Marier Louise Ann
International Business Machines - Corporation
Pennington Joan
Verbrugge Kevin
LandOfFree
Method and apparatus for implementing automatic cache... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for implementing automatic cache..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for implementing automatic cache... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2487705