Method and apparatus for implementing a pipelined A/D converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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Details

330 9, H03M 138, H03F 102

Patent

active

06031480&

ABSTRACT:
A pipelined analog-to-digital converter is disclosed having a plurality of sample and hold converter stages, each having an interstage amplifier (28) associated therewith. This is a differential amplifier that is implemented without common-mode feedback. The sample and hold stage operates on a reset phase and a gain/DAC phase, wherein the output of the reconstructive DAC is summed with the input to the amplifier (28). A differential input amplifier (60) has the inputs thereof set to common-mode input voltage with a feedback capacitor biased to a common-mode output bias point. During the gain/DAC phase, the bias input is removed and the feedback capacitor connected across the input/output of the amplifier (60). This effectively establishes the common-mode bias points for use by the amplifier (60) during the gain/DAC phase. Further, the differential inputs of the amplifier (60) are connected to one side of respective sampling capacitors, the other side thereof connected through a respective switch to the differential inputs. During the reset phase the input voltage is sampled onto the capacitors and, during the gain/DAC phase, the gates of the capacitors are connected together to remove any common-mode voltage from the input prior to being input to the amplifier (60).

REFERENCES:
patent: 5274377 (1993-12-01), Matsuura et al.
patent: 5434569 (1995-07-01), Yung et al.
patent: 5499027 (1996-03-01), Karanicolas et al.
patent: 5530444 (1996-06-01), Tice et al.
patent: 5600322 (1997-02-01), Garavan
Lewis et al, "A Pipelined . . . Analog to Digital Converter," IEEE Journal of SOlid State Circuits, Dec. 1987.
Soenen et al, ". . . Monolithic Pipelined ADCs," IEEE Transactions on Circuits and Systems, Mar. 1995.

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