Method and apparatus for idle cycle refresh request in DRAM

Details Method and apparatus for idle cycle refresh request in DRAM Method and apparatus for idle cycle refresh request in DRAM

2007-11-30

2009-11-03

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S233110, C365S233150, C365S239000

Reexamination Certificate

active

07613061

ABSTRACT:
Generally, methods and apparatus are provided for idle cycle refresh request in a dynamic random access memory. According to one aspect of the invention, a dynamic random access memory is refreshed by determining if a refresh of the dynamic random access memory is required; and allocating an idle cycle sequence to refresh at least a portion of the dynamic random access memory only if the determining step determines that a refresh of the dynamic random access memory is required. A refresh flag can optionally be set if a refresh is required. The idle cycle sequence comprises one or more idle cycles. The idle cycle sequence can optionally be allocated within a predefined duration of the refresh flag being set. The step of determining step whether a refresh of the dynamic random access memory is required can be based on real-time or expected conditions.

REFERENCES:
patent: 6222785 (2001-04-01), Leung
patent: 7043598 (2006-05-01), Wu et al.
patent: 2001/0008496 (2001-07-01), Leung
patent: 2002/0056022 (2002-05-01), Leung

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